[Tmrg] Towards a Common TCP Evaluation Suite

Lachlan Andrew lachlan.andrew at gmail.com
Tue Apr 1 19:35:09 PDT 2008


Greetings all,

Let's get back onto the test suite...

I propose the following text for the multi-hop test:

  The topology is a ``parking-lot'' topology with
  three (horizontal) bottleneck links and four (vertical) access links.
  The bottleneck links have a rate of 100\,Mbps,
  and the access links have a rate of 1\,Gbps.

  All flows have a round-trip time of 60\,ms.
  This can be achieved by all links having a one-way delay of 10\,ms.
  Alternatively, it may be achieved by (a) the second access link
having a one-way
  delay of 30\,ms (b) the bottleneck link to which it does not connect having a
  one-way delay of 30\,ms and (c) all other links having negligible delay.
  (The latter configuration can be extended to more than three bottlenecks, by
  assigning a delay of 30\,ms to every alternate access link, and to zero or one
  of the bottleneck links.)

Other points:
- For the "satellite" link, why does the central (satellite) link have
a symmetric bit rate, while the ground links are asymmetric?  I'd
suggest making the central link 40M/4M, and the ground links all
symmetric, either at 40M or preferably at 100M or 1G.

- The "dial-up" case uses 64kbit/s.  Should we perhaps make that
56kbit/s  in one direction and 48kbit/s  in the other, which is the
best available from a V.92 modem?

- What format should we use for the Internet draft -- xml?  nroff?

I'm hoping to patch  tmix  to let it re-use the same input file for
multiple different traffic loads, but that will take a bit of time...

Cheers,
Lachlan

On 18/03/2008, Sally Floyd <sallyfloyd at mac.com> wrote:
>
>  On Mar 18, 2008, at 10:12 AM, Lachlan Andrew wrote:
>
>  > Greetings Sally,
>  >
>  > On 18/03/2008, Sally Floyd <sallyfloyd at mac.com> wrote:
>  >>
>  >> I think it makes more sense to specify the topology as it is
>  >> specified
>  >> now in Section G ("a "parking-lot" topology with three (horizontal)
>  >> bottleneck
>  >> links and four (vertical) access links"), and then to add that in a
>  >> testbed, this can be *implemented* with only N delay elements.
>  >
>  > I wasn't proposing a change to the arrangements of links, just the
>  > allocation of delays on those links.  The description above describes
>  > both delay allocations equally well.  The only distinction is whether
>  > all links have equal delay, or two have large delays and the rest have
>  > negligible delays.
>  >
>  > If the two delay arrangements are equivalent (as I believe they are)
>  > then I agree it is good to describe the symmetric one and note that
>  > the asymmetric one is equivalent.  It would only become awkward if
>  > there is a useful metric for which they give different results.
>
>
> My assumption was this topology:
>
>        A ------ B ------ C ------ D
>
>  with four access links,  A-E, B-F, C-G, D-H.
>  (I didn't draw the access links, because I don't trust mail
>  readers to all present it the same way...)
>
>  The flows with multiple bottlenecks go from A to D, and vice versa.
>  The single bottleneck flows go between E and F, F and G, and G and
>  H.  So there are three congested links, and four separate paths.
>  All paths have the same 60 ms round-trip time (in the absence of
>  queueing delay.)
>
>  So I am assuming that you want the links B-F and C-D to each have a
>  30 ms. one-way delay, and for the other links to have 0 ms. delay.
>  Or something like that.  But for all links to have the same
>  queue sizes and such.
>
>  I would be happy for the paper to describe the symmetric case,
>  and to note that the asymmetric case is roughly equivalent.
>  (I wouldn't expect it to be *exactly* equivalent, because the
>  timing of packets arriving at forward-path and reverse-path
>  queues should be slightly different.)
>
>
>  - Sally
>  http://www.icir.org/floyd/
>
>


-- 
Lachlan Andrew  Dept of Computer Science, Caltech
1200 E California Blvd, Mail Code 256-80, Pasadena CA 91125, USA
Ph: +1 (626) 395-8820    Fax: +1 (626) 568-3603
http://netlab.caltech.edu/lachlan


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